introduction
Radio stations have different levels of audio signals such as advertisements, news, radio dramas, songs, and relay programs on their own channels. As a result, the audio signal is suddenly large and small when the program is broadcast, which seriously affects the user's listening effect. When rebroadcasting, due to transmission distance and other reasons, there are also phenomena of different signal sizes at the output end of the signal. In the past, the limiting method was adopted for large audio signals, that is, the large signals were limited and output, and the small signals were not processed. In this way, the audio signal is still too small, and the user adjusts the volume by himself, which will also affect the user's listening effect. With the rapid development of electronic technology, computer technology and communication technology, digital signal processing technology has been widely penetrated into various fields such as people's lives. Among them, voice processing is one of the most active research directions in digital signal processing, and is widely used in IP telephony and multimedia communications. Voice processing can be implemented with a general-purpose digital signal processor DSP and a field programmable gate array (FPGA). Among them, the DSP implementation method has the advantages of easy implementation, portable programs, strong processing speed, and fast processing speed. Especially the audio processing of TMS320C54X series of TI company It has a good price-performance ratio, can solve complex algorithm design and meet the real-time requirements of the system, and is widely used in many fields. On the basis of DSP, the AGC algorithm processing of the audio signal can keep the output level within a certain range, and can solve the problem of audio imbalance of different programs.
Audio signal acquisition
TI's DSP chip TMS320V
The C5402 has a unique 6-bus Harvard structure, which enables it to work simultaneously on 6 pipelines with an operating frequency of 100MHz. Use 2 multi-channel buffered serial ports (McBSP0 and McBSP1) of VC5402 to realize seamless connection with AIC23. The multi-channel buffered serial port of VC5402 adds a 2K buffer on the basis of the standard serial port. Each time the serial port sends data, the CPU automatically sends the data in the send buffer; and when receiving data, the CPU automatically writes the received data into the receive buffer. In the automatic buffering mode, it is not necessary to send an interrupt every time a word is transmitted, but an interrupt is generated to the CPU every time the boundary of the buffer is passed, thereby reducing the impact of frequent interrupts on the CPU.
The audio chip uses TLV320 AIC23, which is a high-performance stereo audio A / D and D / A amplifier circuit of TI. The AIC23's analog-to-digital conversion and digital-to-analog conversion components are highly integrated inside the chip, using advanced oversampling technology. The external hardware interface of AIC23 is divided into analog port and digital port. The analog port is used to input and output audio signals, supporting line input and microphone input; there are two sets of digital interfaces, one of which is a digital control interface composed of / CS, SDIN, SCLK and MODE. AIC23 is a programmable audio chip. The control words of the chip are written into the internal registers of the AIC23 through the digital control port, such as sampling rate setting, working mode setting, etc., a total of 12 registers. The communication between the audio control port and the DSP is mainly realized by the multi-channel buffer serial port McBSP1.
AIC23 completes the data communication with the McBSP0 of DSP through the digital audio port, DSP is the master, and AIC23 is the slave. The host provides the send clock signal BCLKX0 and send frame synchronization signal BFSX0. In this mode of operation, the receiving time signal BCLKR0 and the receiving frame synchronization signal BFSR0 are actually provided by the host. Figure 1 is the interface connection between AIC23 and VC5402.
The digital audio interface of AIC23 supports S (Universal Soundton Format) mode, and also supports DSP mode (specifically connected with TIDSP mode), in which DSP mode is used. When working in DSP mode, its frame width can be one bit long.
Figure 2 is a specific circuit diagram of audio signal acquisition.
Circuit design and wiring is an important part of the signal acquisition process, and its effect is directly related to the quality of post-processing. For high-speed DSP-like devices, the external crystal can reach hundreds of megabytes after internal PLL frequency multiplication. This requires the signal lines to take equal lengths and draw multi-layer circuit boards to eliminate electromagnetic interference and signal reflections. Under the premise of two-layer board, you can take the principle that the top layer and the bottom layer cross the line, try to widen the width of the power line and the ground line, the power line is "tree-shaped", and the analog area and digital area are separated Effect.
Implementation of Audio AGC Algorithm
AGC algorithm
The control method to make the gain of the amplifier circuit automatically adjust with the change of signal strength is AGC-automatic gain control. The realization of AGC can be a hardware circuit, that is, an AGC closed-loop electronic circuit, or a software algorithm. This article mainly discusses the use of software algorithms to realize the AGC of audio signals.
Audio AGC is an audio automatic gain control algorithm, more precisely a peak automatic gain control algorithm, and is a mechanism that automatically and dynamically adjusts the gain based on the level of the input audio signal. When the volume (whether captured or reproduced) exceeds a certain threshold, the signal will be clipped. Limiting means that the output of the audio device no longer changes with the input, and the output essentially becomes a horizontal line at the maximum volume position; when it detects that the audio gain reaches a certain threshold, it will automatically reduce the gain to Avoid clipping. On the other hand, if the captured volume is too low, the system will automatically increase the gain. Of course, the adjustment of the gain will not make the volume exceed the value set by the user in the adjustment guide. Figure 3 is a block diagram of the audio AGC algorithm.
AGC algorithm implementation process
First obtain audio data from the serial port, which is a 16-bit integer number. Generally speaking, these numbers are relatively small. The input audio data is projected into a fixed interval through the AGC algorithm, so that regardless of the number of input data points The values ​​are mapped to this space in proportion. On the one hand, the maximum value of the obtained audio data is compared with the original peak, and if a new peak appears, a new gain coefficient is calculated; on the other hand, a new peak is obtained within a certain period of time, and this peak has detection performance , And compared with the original peak value, and then calculate the new gain coefficient. This gain factor is relatively stable. When the volume is increased, the signal peak will automatically increase, so that the gain coefficient will automatically decrease; when the volume is reduced, the new peak will decrease and replace the original peak, so that the peak value decreases and the gain coefficient increases. The final output data is multiplied by the new gain coefficient and mapped to the projection interval of the audio signal input.
Fig. 4 is a program flowchart of the audio signal AGC algorithm.
AGC_Coff is the initial gain coefficient, the initial value is 1; maxAGC_in is the peak gain, the initial value is 0; time is the sampling point count, the threshold is 4096; AGC_in is the new audio data, MAXArrIn is the new audio gain peak; mapping interval [-20000, 20000].
The software part of the entire system is a 5-person module. System main function main (), CMD file, interrupt vector table, DSP5402 header file and library function rtdx.lib specially developed for C language. The main function part is the core, mainly including: DSP device initialization, MCBSP1 initialization, MCBSP0 initialization, AIC23 initialization (internal 12 programmable register settings) and algorithm programs.
In the CCS2.0 integrated development environment, use * .c language and * .asm language
Write programs in a combined way. Compile and link the compiled program * .c, * .asm and linker * .cmd file to generate the execution target file * .out, download the execution target file * .out to the system board through the emulator, after debugging, compiling and Run, and input music to the system board as the audio signal source.
Conclusion
This complete audio signal acquisition and processing system has been applied to actual audio equipment.
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